TSMC reveals performance specifications of its 10nm and 7nm nodes

Posted on Monday, September 26 2016 @ 12:49 CEST by Thomas De Maesschalck
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A couple of days ago, TSMC revealed some more information about its future process nodes. The company's 28+ HKMG and 16FF+ processes are in production now and 10nm will ramp this year. Jack Sun, chief technologist and vice president of R&D at TSMC, also said yields for 256Mbit SRAM chip at 7nm are two months ahead of schedule.

Risk production on the 7nm node is expected to kick off in Q1 2016 and the company provided some details about the expected performance of its future 10nm and 7nm nodes:
The 16nm processes provide about 45% more speed and 80% less leakage than 28+ and supports four voltage levels, TSMC said. The 10nm process provides a 50% die scaling and 20% speed gain or 40% power reduction over 16FF+ and provides “the highest density in the industry today in contact pitch,” said Sun.

Compared to 10nm, TSMC’s 7nm node delivers 15-20% more speed or 35-40% less power consumption and a 1.63x better routed gate density, said Sun. An ARM Cortex-A72 core in the 7nm process could deliver 30% more performance or 56% less power consumption than in 16FFC, said Hou.
Full details at EE Times.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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