"This agreement with Rambus is part of IBM's continued focus on our Cell BE-based chipsets in support of our goal of developing an array of leading edge computing products based on the revolutionary Cell BE architecture," said Kevin Carswell, vice president of worldwide delivery for IBM Engineering and Technology Services, Technology Collaboration Solutions.
The Cell BE processor, jointly developed by IBM, Toshiba and Sony Group, is a breakthrough architectural design featuring eight synergistic processing elements plus a Power Architecture-based core that provides unmatched performance levels in many computationally intense applications. The Cell BE processor has peak performance in excess of 200 GFLOPS -- which equates to 200 billion floating-point operations per second -- as measured during initial hardware testing.
The Rambus XDR memory interface and FlexIO processor bus account for 90% of the Cell BE processor signal pins, providing an unprecedented aggregate processor I/O bandwidth of approximately 100 gigabytes-per-second. The Rambus XDR memory interface connecting to XDR DRAMs achieves data rates of 3.2GHz to 8.0GHz. FlexIO processor buses, formerly codenamed Redwood, are capable of running up to 8.0GHz data rates, providing bandwidth more than four times faster than best-of-class processor buses available today. All Rambus high-speed interfaces are developed as complete solutions for high-volume, low-cost systems.