More AMD Barcelona processor details

Posted on Tuesday, Feb 13 2007 @ 01:12 CET by Thomas De Maesschalck
The Inq has a few tidbits more information about the quad-core Barcelona CPU from AMD:
The first thing that Barcelona adds is a very much more flexible clocking scheme for the cores. There are PLLs for each core now, so they can be clocked independently. With the older K8 chips, all cores had to go up or down together regardless of load.

With Barcelona/K10, each core can change speed as needed potentially saving a lot of power. The only problem is that they can not vary voltage independently on each core so more power is consumed than necessary. Put this down for a future to do list. The voltage is set by the most loaded core, so it can ramp down quite a bit on really light loads.

More interesting is the memory controller power savings. New to K10 is the ability to manage DDR channel power. If K10 sees that memory is using only writes, it can shut down read channels. If it is only reading, it can shut down write channels. This again saves a chunk of wattage.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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