This new technology, designed using IBM’s Silicon-on-Insulator (SOI) for high-performance at low power, vastly improves microprocessor performance in multi-core designs and speeds the movement of graphics in gaming, networking, and other image intensive, multi-media applications.
The technology is expected to be a key feature of IBM’s 45nm (nanometer) microprocessor roadmap and will become available beginning in 2008.
IBM’s new eDRAM technology, designed in stress-enabled 65nm SOI using deep trench, dramatically improves on-processor memory performance in about one-third the space with one-fifth the standby power of conventional SRAM (static random access memory).
"With this breakthrough solution to the processor/memory gap, IBM is effectively doubling microprocessor performance beyond what classical scaling alone can achieve,” said Dr. Subramanian Iyer, Distinguished Engineer and director of 45 nm technology development at IBM. “As semiconductor components have reached the atomic scale, design innovation at the chip-level has replaced materials science as a key factor in continuing Moore’s Law. Today’s announcement further demonstrates IBM’s leadership in this critical area of microprocessor design innovation.”
cell size: 0.126 mm2 Power supply: 1 V availability: 98.7% Tile: 1K RowX16 Col X146 (2Mb) AC power: 76 mW standby keep alive Power: 42 mW Random cycle time: 2ns Latency: 1.5ns