Intel Xeons with 4MB cache coming in Q1 2004

Posted on Thursday, Oct 09 2003 @ 20:41 CEST by Thomas De Maesschalck
According to another news post by the Inquirer we can expect the launch of new Xeon processors with 2MB and 4MB L3 cache Q1 2004. The 4MB ones will be available in 3GHz, 2.7GHz and 2.2GHz versions, and the 2MB L3 cache Xeon will be available in a 3.2GHz version. The 3.2GHz Xeon with 2MB L3 cache is expected to cost $1050. Here is some more server news :

Jayhawk/Lindenhurst will now be shuffled back from Q4 next year to Q1 in 2005, while the Potomac/Twin Castle pair will arrive in Q1 of 2005.

There's also delays on its "next generation" workstation chip, while Intel's 1P Prescott 7210 product moves from Q4 2003 to Q1 of 2004. Meanwhile Intel has changed the LAN Dual Northway codename to Ophir. Why? Someone knows, but they're not telling the INQUIRER.

Nocona – which is the "Xeon" version of Prescott, also shuffles into Q2 of next year, as we suspected, while Madison 9M and a Deerfield refresh will be introduced in the third quarter of next year.

Intel will introduce a low voltage Nocona for blades at 2.80GHz in Q3 of next year, using the Lindenhurts chipset.

We've some confirmation of our story from Computex about Intel introducing modular designs – Potomac will apparently be built this way.

Jayhawk, which like Potomac is supported by the Tumwater chipset, is likely to fly along at close to 4GHz at launch.

Source : The Inquirer


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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