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AMD Shanghai has improved IPC

Posted on Wednesday, August 01 2007 @ 00:55:02 CEST by


FUD Zilla writes the 45nm Shanghai processor from AMD will have an improved IPC.
It is codenamed K10.5 and will have 6 MB of L3 cache, but more important it will support a new set of instructions.

AMD calls this improved IPC and we found out that this should mean that the new core will have faster “interprocess communication”.

AMD already claims that Barcelona will have improved IPC and you can find a slide here, but Shanghai should have this part even faster. That is why they call it K10.5.




 



 

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