Intel Penryn processor enhancements unveiled

Posted on Monday, Aug 06 2007 @ 15:17 CEST by Thomas De Maesschalck
Intel's upcoming Penryn processor will be more than just a 45nm die shrink of its current 65nm processors, the new refresh will feature several tweaks to offer more performance at the same clockspeed as the current Conroe processors.

In Penryn, Intel has made optimizations to the Wide Dynamic Execution, Advanced Smart Cache, Advanced Digital Media Boost and Intelligent Power Capability technologies:
Penryn enhances Wide Dynamic Execution technology with a fast radix-16 divider and improved Virtualization technology. With a fast radix-16 divider, the processor can process 4-bits per cycle instead of the 2-bits per cycle of Conroe – doubling the divide instruction capabilities. Intel VT technology receives enhancements that reduce virtual machine transition latencies by 25-to-75%.

Intel Advanced Smart Cache technology receives additional enhancements, besides the increased L2 cache. Penryn-based quad and dual-core processors will have up to 12MB and 6MB L2 cache, respectively. Intel reduces cache latency in addition to the larger sizes. Penryn features a 24-way associative cache, an upgrade from Conroe’s 16-way associative cache.

New to the Advanced Digital Media Boost technology is the inclusion of a new Intel SSE4 instruction set. SSE4 introduces 47 new instructions to improve performance of video accelerators, graphics building blocks and streaming load. Intel claims a 2x performance gain in video acceleration tasks. There are 14 new instructions for video accelerator performance enhancement. Intel improves compiler auto-vectorization performance with 32 new instructions.

Intel expects SSE4 optimizations to deliver performance improvements in video authoring, imagine, graphics, video search, off-chip accelerators, gaming and physics applications. Also new to Advanced Digital Media Boost is the Super Shuffle Engine. Intel’s Super Shuffle Engine allows for shuffling unpacking, packing, align concatenated sources, wide shifts, insertion and extraction, and setup for horizontal arithmetic functions. Intel claims a “2x faster SSE shuffle instruction execution,” according to briefing documents.
The mobile Penryn chips will feature new power saving technologies like a deep power down state which lowers the CPU core voltage, more so than in the C4 state, and turns of the L1 and L2 caches. This should offer a nice increase in battery life.

Server and workstation Penryn processors will feature headroom for an FSB increase to 1600MHz

Penryn will be succeeded in 2008 by Nehalem. Other future CPUs from Intel include Westmere, a 32nm version of Nehalem, and Sandy Bridge, which will be a new 32nm architecture.

Source: DailyTech

About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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