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Tilera Tile64 - a tile-based 64-core processor

Posted on Monday, August 20 2007 @ 19:26:12 CEST by

A firm called Tilera today introduced their Tile 64 processor, a high-performance tile-based solution with 64 cores for embedded applications such as networking and digital video processing.

According to the press release this chip has 10x more performance than a dual-core Intel Xeon processor, while sporting 30x the performance-per-watt of this chip.

Each tile of this processor is a full-feature processor, with integrated L1 and L2 cache and a non-blocking switch that connects the tile into the mesh. This means that each tile can independently run a full operating system, or multiple tiles taken together can run a multi-processing operating system like SMP Linux.

The TILE64 processor family slashes board real estate and system cost by integrating a complete set of memory and I/O controllers, thus eliminating the need for an external North Bridge or South Bridge. It delivers scalable performance, power efficiency and low processing latency in an extremely compact footprint.

With a standard ANSI C programming environment, developers can leverage their existing software investment as well as utilize the vast body of Open Source code available. Tiles can be grouped into clusters to apply the appropriate amount of horsepower to each application. Since multiple operating system instances can be run on the TILE64 simultaneously, it can replace multiple CPU subsystems for both the data plane and control plane.

The firm aims to expand its processor family with new 36-core and 120-core variants and by 2014 Tilera wants to launch a chip with 1000 cores. More info at Tilera.



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