Intel Caneland quad-socket platform benchmarked

Posted on Thursday, Sep 13 2007 @ 19:47 CEST by Thomas De Maesschalck
The Inq ran some benchmarks on a quad-socket Intel Caneland system:
THIS WAS A FUN WEEK for workstation and server users, as AMD announced its long-delayed Barcelona (samples of which are slow to appear) and Intel got its quad-socket Caneland platform with "Tigerton" Core 2 CPUs and Clarksboro chipset out of the door - a few weeks before its main course, the Harpertown Penryn 45nm round.

As Charlie mentioned here, Clarksboro chipset is a complex little item, with four independent FSB1066 paths, one for each CPU, meeting together and, through a 64MB cache snoop buffer - generously sized to support even a hypothetical future 16 MB Penryn or future FSB-based device, if any appears - accessed four FB-DIMM 533 channels.
Check it out over here.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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