Posted on Friday, October 05 2007 @ 1:25 CEST by Thomas De Maesschalck
At the Gelato Itanium Conference and Expo in Singapore, Intel's principal engineer of the Itanium processor Cameron McNairy said Intel will not only increase the number of cores in the future but will also make sure that the performance of each individual core goes up:
Referring to the generation move from Itanium 2 9M to dual-core Itanium 2, McNairy said: "We made several changes, even though the core was essentially the same."
Citing examples of the changes, he added: "We separated the instruction cache from the data cache, simplified some of the conflicts in the data cache, (and) increased core resources."
The Itanium 2 9M chip, which debuted in November 2004, is an upgraded member of the Madison line. Dubbed Madison 9M, the 130-nanometer processor features high-speed cache memory from 6MB to 9MB.
The Dual-Core Itanium 2 chip, also known as Montecito, was launched in July last year. The processor was built on a manufacturing process with circuitry dimensions of 90nm and has two processor cores.
McNairy said improvements in "the single-stream performance" of a core processor can be expected in the next transition from Montecito to Tukwila.
He said Intel will also be looking to increase the efficiency of its multithreading technology, also known as hyperthreading technology, but declined to reveal further details.
While increasing the strength of individual cores of the processor is "intended to increase performance," McNairy noted, this may not apply to all workloads.
Source: CNET
