The new flash device was successfully developed through the use of a new manufacturing process called self-aligned double patterning technology (SaDPT). In SaDPT, the 1st pattern transfer is a wider-spaced circuit design of the target process technology, while the 2nd pattern transfer fills in the spaced area with a more closely designed pattern. (Refer to image)
SaDPT represents a pivotal advancement beyond the charge trap flash (CTF) technology-based NAND flash that Samsung developed last year when it introduced a new material (silicon nitride) and a new structural configuration for flash memory. SaDPT resolves a critical bottleneck to forming sub-30nm circuitry by expanding the role that conventional lithography technology plays in the manufacturing process. Both Samsung’s CTF-based NAND flash technology and SaDPT are expected to provide improvements in cost efficiency for next-generation nanometer-scale designs.
Samsung’s SaDPT will employ existing photolithography equipment in 30nm production, which is expected to be commercialized beginning in 2009. By utilizing conventional photolithography equipment, Samsung can not only significantly speed up the process but also improve the cost efficiency of its manufacturing operations without additional facility investment. Samsung has applied for 30 patents in connection with the new 64Gb flash device.
Samsung also has developed a 32Gb single level cell (SLC) NAND flash memory based on the same technology applied to its 64Gb device. Samsung’s continued success in introducing higher density NAND flash will intensify demand for solid state drives in notebooks and other NAND-based storage devices for applications such as digital camcorders and enterprise servers.
Samsung expects to begin production of 30nm-class 64Gb flash devices in 2009. According to Gartner Dataquest, the accumulated sales for 64Gb NAND flash and higher density devices could reach up to $20 billion in just three years (2009~2011).
Picture courtesy of AVing.