Toshiba to use Rambus XDR in HDTV chipset

Rambus announced that Toshiba has licensed its XDR memory controller interface cell (XIO) and XDR memory controller (XMC) for next-generation high-definition television (HDTV) chipsets. The XIO and XMC will be implemented in Toshiba’s 65nm process. Operating at 4.8Gbps, the XDR memory architecture will allow Toshiba’s HDTV chipset to deliver state-of-the-art image processing performance in its customers’ HDTVs.

“HDTVs now require as much memory bandwidth as many PCs in order to deliver the advanced features consumers demand,” said Hideki Moriyama, Deputy General Manager of the System LSI Division at Toshiba's Semiconductor Company. “With the XDR memory architecture, we are able to achieve both superior performance and a reduced bill of materials for our customers’ HDTV applications.”

The XDR memory architecture uses patented Rambus innovations such as Octal Data Rate (ODR) technology, Differential Rambus Signaling Level (DRSL), and FlexPhase™ circuits to deliver the highest bandwidth available while using fewer DRAM devices than industry-standard memory solutions. Higher memory performance as delivered by the XDR architecture enables the advanced features of next-generation HDTVs such as 1080p+ resolution, 120Hz refresh rates, 12-bit color, multiple full HD Picture-in-Picture (PiP) data streams, and advanced image enhancement algorithms.

“As a leading supplier of chipsets to HDTV manufacturers Toshiba delivers an exceptional viewing experience for consumers,” said Sharon Holt, senior vice president of sales, licensing and marketing at Rambus Inc. “With the XDR memory architecture, we’re able to meet the growing demands for bandwidth in an exciting new generation of consumer electronics products.”

Proven in high-volume and cost-competitive applications, Rambus solutions are backed by comprehensive engineering support services that range from chip design to system integration. XDR DRAM licensees include Elpida Memory Inc., Qimonda AG, and Samsung Electronics Co. Ltd.