Intel announces first NOR Flash memory device made on 90nm process

Posted on Thursday, Feb 19 2004 @ 21:43 CET by Thomas De Maesschalck
Even more news coming from the Intel Developer Forum. Intel anounced today the first NOR Flash memory device made on the 90nm process. According to Sean Maloney, Intel Executive Vice President, the Intel Wireless Flash Memory made on the 90nm process has an approx. 50 percent smaller die size compared to previous generations, thus it will lower costs.

  The first flash memory product will be a single-bit-per-cell device, with devices available later this year on Intel's multi-level cell (MLC) technology, which holds twice the amount of information in one cell.

"Intel Wireless Flash Memory is the highest performance solution available today for wireless applications," said Tom Lacey, vice president, Intel Flash Products Group. "It combines four innovations into one product: low 1.8V operation, direct code execution (execute-in-place), enhanced factory programming and dual code and data storage in one chip. All four are important features which enable our wireless customers to develop reliable state-of-the-art devices."

Intel Wireless Flash Memory on 90 nm process technology is the latest member of the Intel Stacked Chip Scale Packaging (Stacked-CSP) product line. By offering a common package pin out and Intel flash software solutions across a range of densities, stacked flash memory integration and upgrades are easily made and enable device designers to pack more memory into less space. Intel combines its high-density flash memory products with flexible RAM options to offer densities up to 1 Gb in a small package size of 8 mm x11 mm.

With more than 18 years of flash memory industry experience, Intel continues to be a leader in NOR flash memory. Intel is the leading supplier of flash memory to the wireless market segment and also provides solutions for other applications including consumer electronics and communications devices.


The Intel Wireless Flash Memory based on the 90nm process will sample in April in 64MB densities. Volume production is planned in Q3 of this year with a price of $10.26 in 10,000 unit quantities. Intel plans to sample MLC Intel StrataFlash Wireless Memory on 90nm later this year. These MLC devices will include 256 Mb and 512 Mb discrete densities and will offer various stacked configurations.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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