The Secrets of PC Memory: Part 4

Posted on Sunday, Feb 10 2008 @ 12:39 CET by Thomas De Maesschalck
Bit Tech just published the fourth part of our ongoing feature looking into the technology behind PC memory. They follow on from the previous part by looking at DDR3 memory and how it's different to DDR2, and where memory technology might need to go in the future.
"For better signal quality at higher speed grades, DDR3 adopts a so called “Fly-by” architecture for the commands, addresses and clock signals. This effectively reduced the number of stubs and signalling length from the DDR2 T-Branch architecture to a more elegant and straightforward design.

The Fly-by topology generally connects the DRAM chips on the memory module in a series, and at the end of the linear connection is a grounded termination point that absorbs residual signals, to prevent them from being reflected back along the bus.

We recently asked Aaron Boehm, an Application Engineer at Micron about how important the Fly-by topology is to DDR3. He said that the Fly-by design was “ very important in DDR3. Probably one of the biggest advantages of moving to the Fly-by topology is that we are able to achieve a much faster slew rate for the signal. This gives us a bigger data-eye, which is very important in DRAM.”
Read on over here.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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