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IDF Shanghai: Larrabee and AVX

Posted on Wednesday, April 02 2008 @ 18:59:58 CEST by


Here's what Intel had to say about its upcoming Larrabee architecture and the new Intel AVX instruction set:
Larrabee Architecture for Visual Computing. With plans for the first demonstrations later this year, the Larrabee architecture will be Intel’s next step in evolving the visual computing platform. The Larrabee architecture includes a high-performance, wide SIMD vector processing unit (VPU) along with a new set of vector instructions including integer and floating point arithmetic, vector memory operations and conditional instructions. In addition, Larrabee includes a major new hardware coherent cache design enabling the many-core architecture. The architecture and instructions have been designed to deliver performance, energy efficiency and general purpose programmability to meet the demands of visual computing and other workloads that are inherently parallel in nature. Tools are critical to success and key Intel Software Products will be enhanced to support the Larrabee architecture and enable unparalleled developer freedom. Industry APIs such as DirectX and OpenGL will be supported on Larrabee-based products.

Intel AVX: The next step in the Intel instruction set -- Gelsinger disclosed the Intel AVX (Advanced Vector Extensions) specification, which when used by software programmers, will increase performance in floating point, media, and processor intensive software. AVX can also increase energy efficiency, and is backwards compatible to existing Intel processors. Key features include wider vectors, increasing from 128-bit to 256-bit wide, resulting in up to 2x peak FLOPs output. Enhanced data rearrangement, resulting allowing data to be pulled more efficiently and three operand, non-destructive syntax for a range of benefits. The instructions will be implemented in the microarchitecture codenamed “Sandy Bridge” in the 2010 timeframe.



 



 

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