Posted on Wednesday, April 02 2008 @ 21:23 CEST by Thomas De Maesschalck
Today Intel
showed off a Nehalem processor running at 3.2GHz at the IDF in Shanghai. The first Nehalem processors are expected in the last quarter of this year.
Intel's Nehalem is truly a radical architecture departure from Intel thanks to its integrated memory controller which is called the QuickPath Interconnect. This serial bus is similar in nature to the HyperTransport which AMD has touted ever since the launch of its Opteron server processors. The QuickPath Interconnect will support triple-channel DDR3-1333 memory.
The first available Nehalem processors will be built on the existing 45nm manufacturing process, will incorporate SSE4 instructions, and will feature four fully integrated cores. Each core will have its own dedicated 256KB L2 cache and each core will share an 8MB of L3 cache pool. The bulk of these 731 million transistor processors are dedicated to cache.
Event demonstrations at the Shanghai Intel Developer Forum, occurring now until the end of the week, show A1 silicon Bloomfield-based Nehalem processors at IDF at a speedy 3.2 GHz.
Like the 533 MHz variants of Intel's new Silverthorne-based Atom processors, Nehalem will also incorporate Simultaneous Multithreading (SMT) which is also known as Hyper-Threading (HT). Each physical core in a single Nehalem processor is paired up with its own virtual core. As a result, the processor is treated as having eight threads/processors.
