The world’s second largest provider of x86 microprocessors reaffirmed that AMD Opteron processor code-named Shanghai is “on schedule to begin production in the second half of 2008”. The chip will have four processing engines, 2MB of L2 cache (512KB per core) as well as 6MB of unified L3 cache; in addition, the processor will include “core and instruction-per-clock” enhancements.More details at X-bit Labs.
Instead of octa-core AMD Opteron processor code-named Montreal and third-generation server platform in the second half of 2009, the chipmaker decided to introduce six-core code-named Istanbul processor with 6MB L3 cache and continue to use second-generation socket F (1207) platform. This allows makers of current-generation servers to install higher-performance chips into existing machine and increase their performance-per-watt without any substantial investments into development.
In the first half of 2010 Advanced Micro Devices will bring six-core Sao Paulo with 6MB L3 cache and twelve-core Magny-Cours with 12MB L3 cache processors that will have DDR3 memory controller and will utilize third-generation AMD Opteron platform with socket G34 code-named Maranello that will feature AMD’s own-developed 890-series chipsets. The new processors will be made using 45nm process technology.
The roadmap change of AMD indicates that the company is trying to ensure that it can deliver products on time, which is why octa-core processor due in 2009 was cancelled in favour of more simplistic six-core chip. Besides, AMD decided not to push its next-generation Bulldozer micro-architecture into server segment in the first half of 2010, but plans to develop multi-core processors based on the K10 micro-architecture.
AMD eight-core Montreal canned, new server platform delayed
Posted on Friday, May 09 2008 @ 00:45 CEST by Thomas De Maesschalck