TSV interconnect discussed

Posted on Sunday, Sep 21 2008 @ 11:27 CEST by Thomas De Maesschalck
DigiTimes has an article about the future of chip manufacturing, the focus of the article is Through Silicon Vias (TSV), a more advanced off-chip interconnect scheme that provides much shorter path lengths and lower resistance and inductance than bond wire structures for signal and power delivery. Here's a snip:
In the TSV design, the chips are stacked on top of each other but instead of using wire bonding, each silicon via is etched in a manner that passes through all the layers. A material such as copper is then used to fill in the vias and function as interconnects, thus connecting all the chips into one.

TSV has the potential to facilitate cheaper development costs than that for SoC, while delivering better performance than SIP. TSV delivers advantages such as shortening the distance between circuitry without any limitations being set for how many dies can be stacked. Therefore, a TSV-made device with enhanced speed and performance is more suitable for smaller devices.
Read more over here.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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