Convey Computer Corporation presented world's first x86 hybrid core computer at SC08. This system features Intel Xeon processors and custom engineered Xilinx FPGA co-processors that process data alongside their x86 counterparts, enabling significant advances in power efficiency.
Sharing the same real and virtual memory space, this design also allows for significant advances in performance per watt. Convey uses ANSI standard C/C++/Fortran, making development much simpler and almost entirely x86-based.
According to Dr. Larry Smarr, director of the California Institute for Telecommunications and Information Technology, "The HC-1 is a remarkably ingenuous and innovative HPC architecture, which combines the best of both worlds of special purpose multi-core and special-purpose FPGAs." Smarr calls the HC-1 a "new class" of HPC architecture.
The custom-developed co-processor appears to developers as a mere extension of the traditional x86 ISA. They share the same physical and virtual address spaces, and each application can contain both x86 and co-processor instructions embedded within a single application and single instruction stream, as is generated by the Convey compilers.
Pat Gelsinger, Intel's senior VP and GM of its Digital Enterprise Group, said, "Convey’s system is unique in that it does not require programmers to instrument their code but, instead, provides an open-standard programming model that does not use proprietary mechanisms that have historically limited adoption of heterogeneous solutions."