Interestingly, while the CPU core in Clarkdale will be fabricated using Intel’s new 32nm technology, the chip’s DDR3 memory controller and GPU will be built using 45nm transistors. The three will sit together in a multi-chip package, and communicate via a high-speed QPI link.
The chips are designed to be used with Intel’s forthcoming mainstream 5-series chipsets, which will feature 16 PCI-E 2.0 lanes that can either be assigned to a single x16 slot or two x8 slots. Intel hasn’t yet announced whether the chipsets will support CrossFire or SLI, but we’d expect them to support both given Intel’s commitment to the two technologies when it launched the X58 chipset - it will require validation on AMD's and Nvidia's part as well.
Intel talks about first CPU with integrated graphics
Posted on Wednesday, Feb 11 2009 @ 14:43 CET by Thomas De Maesschalck