AMD Says Multi-Core, DDR3, HyperTransport 3, PCI Express Gen 2 – Future

Posted on Saturday, Dec 11 2004 @ 02:43 CET by Thomas De Maesschalck
Advanced Micro Devices this week revealed some details about its future processors during its presentation at the Lehman Brothers T4 Conference. The company sees the future of central processing units in increasing count of processing engines, more advanced memory controllers and higher-bandwidth I/O busses.

The Road Ahead
The milestones of the road ahead are dual-core, quad-core and eight-core processors to allow highly-parallel tremendously efficient architecture; DDR2, DDR3 memory types as well as FB DIMMs to constantly drive unbelievable transfer rates of system memory to match the increased core-clocks and number of cores; HyperTransport 3 as well as PCI Express 2 interconnection busses; split power planes that allow CPU to reduce voltage when only memory controller operates, which decreases overall power consumption of chips; as well as Presidio and Pacifica technologies – advanced security and virtualization capabilities.

Read more at X-bit Labs


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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