TSMC adds High-k Metal Gate Low Power process to its 28nm roadmap

The 28nmHPL (low power with HKMG) process is a derivative of TSMC’s high performance HKMG technology and features low power, low leakage, and medium-high performance on a gate-last approach. It supports low leakage applications such as cell phone, smart netbook, wireless communication and portable consumer electronics.

The 28nm HPL process comes complete with comprehensive device support and is considered suitable as a SoC platform for general market applications. It is differentiated from the 28LP technology, which is positioned for cellular and handheld applications where lower cost and faster time-to-market from an evolutionary SiON process is most attractive.

The 28nm HP process, announced as part of the September 2008 introduction, is also built on a gate-last approach and supports performance driven devices such as CPUs, GPUs, Chipsets, FPGAs, video game console and mobile computing applications.

“We developed a gate-last approach for TSMC’s 28nm high-k metal gate family that is superior in terms of transistor characteristics, high end and low end performance upside, and manufacturability,” said Dr. Jack Sun, vice president, Research and Development, TSMC.

“TSMC has been working with customers over a significant period of time to develop high-k metal gate technologies for low power applications. The addition of the 28nm HPL to the 28nm technology family, combined with the 28LP and 28HP, means that TSMC now provides the most comprehensive 28nm technology portfolio,” said Dr. Mark Liu, senior vice president, Advanced Technology Business, TSMC.

To fully utilize the power of the 28nm technology family for a broad range of differentiating products, TSMC is working closely with customers and ecosystem partners to build a comprehensive design infrastructure based on the company’s recently unveiled Open Innovation Platform™. The Open Innovation Platform™, hosted by TSMC, is open to TSMC customers and partners.