AMD 12-core Magny-Cours expected in Q1 2010

Posted on Tuesday, Aug 25 2009 @ 17:18 CEST by Thomas De Maesschalck
TC Mag reports AMD has narrowed down the launch date of the 12-core "Magny-Cours" Opteron to Q1 2010. These server processors will run at slower clockspeeds than their six-core counterparts to fit in the required power envelopes.
Previously set for a more 'general' 1H 2010 arrival, the 12-core 45nm Magny-Cours server processors, which will be officially known as the Opteron 6000 series, feature two 6-core Sao Paolo dies, four HyperTransport (3.0) links, a 4 channel integrated DDR3 memory controller, and a total of 12MB of L3 cache (6MB per die). The Magny-Cours Opterons also make use of a new Socket - G34 (1974 pins).


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Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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