Posted on Thursday, October 08 2009 @ 17:04 CEST by Thomas De Maesschalck
EE Times
reports ARM researchers have created a new 45nm SOI test chip that consumes up to 40 percent less power over chips produced with traditional 45nm technology:
ARM and Soitec collaborated to produce a test chip to demonstrate the power savings in a real silicon implementation with a well-known, industry-standard core. The goal was to produce a comparison of 45-nm SOI high-performance technology with bulk CMOS 45-nm low-power technology of the same product.
The results show that 45-nm high-performance SOI technology can provide up to 40 percent power savings and a 7 percent circuit area reduction compared to bulk CMOS low-power technology, operating at the same speed. This same implementation also demonstrated 20 percent higher operating frequency capability over bulk while saving 30 percent in total power in specific test applications.
