A single Bobcat core [Tomcat] is extremely efficient - in less than 1W TDP, Bobcat is bringing "90% of today's mainstream performance in less than half of the silicon area". The idea behind Bobcat is to offer a complete support for x86 ISA, with SSE1, SSE2 and SSE3 instruction sets, hardware virtualization for high-density server systems and many more.
As you can see on the picture above, the architecture is very simple, following the base principle of AMD's M-SPACE concept - throughput. Bobcat architecture will debut as Ontario APU [Accelerated Processing Unit], featuring two Bobcat cores, Northern Islands GPU architecture [DirectX 11.1], all packaged in BGA format. The memory of choice is naturally, low-power DDR3 memory.
AMD Bobcat architecture features sub-1W TD
Posted on Thursday, November 12 2009 @ 21:21 CET by Thomas De Maesschalck
Bright Side of News brigns some information about AMD's upcoming Bobcat architecture for mobile devices. This architecture will arrive in 2011, it will feature a single-core Tomcat chip with a TDP of less than 1W and also a dual-core Twincat.