Back in May 2009, AMD split the SSE5 into CVT16, FMA4 and XOP. We spoke with Chekib Akrout, Corporate VP at AMD to clarify why SSE5/CVT16/FMA4/XOP instruction sets weren't mentioned on slides during today’s Financial Analyst Day. In a brief discussion, we asked what is the status of SSE5 as such and when are we going to see the products based on it. Chekib answered that SSE5 will "show up sooner than later."
In a way, we feel that AMD has once more decided to subdue the SSE5 message, which is a shame. Given that Intel plans to introduce the hardware Fused-Multiply-Add support [FMA3] with their 22nm generation [Haswell], AMD's Bulldozer has a clear lead with FMA4.
AMD to use SSE5 sooner than later
Posted on Friday, November 13 2009 @ 0:10 CET by Thomas De Maesschalck