Intel announced a partnership with researchers at Glasgow University to develop future nanoscale memory technologies for next-generation tera-scale computer memory systems. More info at EE Times.
The taskforce has been asked to come up with new ways of designing future microchip memories which take into account the variability and unreliability of nano-scale transistors.
The 'Tera-scale Reliable Adaptive Memory Systems' (TRAMS) consortium includes: Intel Corp. Iberia, Interuniversitair Micro-Elektronica Centrium vzw, the University of Glasgow, and the Universitat Politecnica de Catalunya, and is financed through the EU's Framework Programme 7 science research fund.
Professor Asen Asenov, of the Department of Electronic and Electrical Engineering at the University of Glasgow said, "Tera-scale computing will transform the power, performance and functionality of personal computers, phones and other electronic devices as well as large computing facilities such as data centres."