Intel and Glasgow University collaborate on tera-scale memory project

Posted on Wednesday, February 24 2010 @ 4:35 CET by Thomas De Maesschalck
Intel announced a partnership with researchers at Glasgow University to develop future nanoscale memory technologies for next-generation tera-scale computer memory systems. More info at EE Times.
The taskforce has been asked to come up with new ways of designing future microchip memories which take into account the variability and unreliability of nano-scale transistors.

The 'Tera-scale Reliable Adaptive Memory Systems' (TRAMS) consortium includes: Intel Corp. Iberia, Interuniversitair Micro-Elektronica Centrium vzw, the University of Glasgow, and the Universitat Politecnica de Catalunya, and is financed through the EU's Framework Programme 7 science research fund.

Professor Asen Asenov, of the Department of Electronic and Electrical Engineering at the University of Glasgow said, "Tera-scale computing will transform the power, performance and functionality of personal computers, phones and other electronic devices as well as large computing facilities such as data centres."


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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