As reported earlier, AMD Llano accelerated processing unit (APU) will have four x86 cores based on the current micro-architecture each of which will have 9.69mm² die size (without L2 cache), a little more than 35 million transistors (without L2 cache), 2.5W – 25W power consumption, 0.8V – 1.3V voltage and target clock-speeds at over 3.0GHz clock-speed. The clock-speeds will dynamically scale their clock-speeds and voltages within the designated thermal design power in order to boost performance when a program does not require all four processing engines or trim power consumption when there is no demand for resources. According to sources familiar with the matter, different versions of Llano processor will have thermal design power varying from 20W to 59W: high-end dual-core, triple-core and quad-core chips will have TDP between 35W and 59W; mainstream chips with two of four x86 cores will fit into 30W thermal envelope and low-power dual-core Llano chips will have 20W TDP.
AMD Sabine platform specifications uncovered
Posted on Wednesday, March 03 2010 @ 2:58 CET by Thomas De Maesschalck