Theo Valich from Bright Side of News received a clean room tour at GlobalFoundries and reports he was quite impressed by the foundry's high yields. He spotted 28nm bulk CMOS test samples and 32nm SOI test patterns with surprisingly low defects, and even spotted some 45nm wafers with zero defects:
On a 45nm sexa-core wafer, the highest number of defects was 534, but that was just after washing [the defect checking machine functions on the basis of optical check of patterns]. Later in the process, same wafer came with only 30 manufacturing defects for a 300mm wafer that holds out way over several hundred billion transistors - naturally, divided into smaller dies. Overall, few discarded dies and several hundred "good to go" ones. Naturally, just as if the silicon is perfect does not mean that 100% of the chips from that wafer will come to life. Yet, we were told that the number of working dies per wafer is "industry leading".
What was interesting was noticing multiple "zero-defect wafers", i.e. 45nm wafers that had no less than 100% yield. We saw multiple 100% yielding wafers with both Istanbul/Lisbon/Magny-Cours and Shanghai/Deneb dies, as well as wafers with less than 10 defects. The term "German precision" definitely applies here. In a world where a transistor is mere 3-7 atoms thick, seeing a zero-defect wafer is still very much surprising. Seeing several hundred billion of perfect transistors, consisting only out of few Si atoms each, one cannot but marvel at the way how semiconductor industry developed.