Posted on Wednesday, November 17 2010 @ 23:04 CET by Thomas De Maesschalck
X-bit Labs
reports Intel demonstrated the "Knights Ferry" HPC accelerator at the SC10 trade show:
The code-named Knights Ferry device - which is not supposed to become a commercial compute solution and which is believed to be based on the code-named Larrabee GPU design - performed operations typically made on clusters or machines with many processing cores.
During SC10, Intel conducted demonstrations showcasing the real-world capabilities of the recently announced MIC (many Intel core) architecture. These included using Intel MIC architecture as a co-processor running financial derivative Monte Carlo demonstrations that boasted twice the performance of those conducted with prior generation technologies. The Monte Carlo application for Intel MIC was generated using standard C++ code with an Intel MIC-enabled version of the Intel Parallel Studio XE 2011 software development tools, demonstrating how applications for standard Intel CPUs can scale to future Intel MIC products.
