New Sandy Bridge Details at ISSCC

Posted on Thursday, April 21 2011 @ 4:35 CEST by Thomas De Maesschalck
David Kanter from RealWorldTech learned some new Sandy Bridge details at ISSCC, you can read it over here.
When Intel disclosed the architecture of Sandy Bridge, they purposefully held back a number of details for later discussion at ISSCC. The Sandy Bridge paper at ISSCC is fascinating for a number of reasons. First, it explains many of Intel’s high level architectural choices (such as the ring interconnect) and circuit design solutions (such as the advanced Turbo mode) that reduce power consumption and improve performance. From these observations we can safely conclude that Intel will substantially increase the die area spent on graphics in Ivy Bridge.

Second, the problems that Intel faces at 32nm – design complexity, process variation, power efficiency and validation - will hit the rest of the industry 1-2 years later. In some sense, the paper gives a preview of future developments at other companies, such as AMD, ARM, IBM, Nvidia and Oracle. Intel is showcasing a number of techniques to take advantage of Moore’s Law to create better products. The rest of the industry will undoubtedly use somewhat similar, but slightly different approaches in future products such as Nvidia’s Kepler or AMD’s Bulldozer or Southern Islands.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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