ARM on stage at AMD event

Increases in clock speeds may turn out to be considerably less than expected as chipmakers move to 28 nm, 20 nm, and finer process nodes. As the second slide shows, finer processes will definitely allow more transistors per square millimeter. However, the amount of power used by each transistor won't drop dramatically. Davies said these constraints will mean some parts of the silicon will have to remain "dark" so that current power envelopes aren't outgrown by future chips (which will have higher transistor counts, similar-sized dies, yet similar or not much lower power consumption per transistor).