Intel MICs to use QPI Bus instead of PCIe?

Even though PCI Express allows AMD and Nvidia to easily adopt their high-end graphics processing units (GPUs) for high-performance computing (HPC) needs, usage of PCIe means that a number of useful features (e.g., unified address space, quick access to data located in main CPU's memory, etc.) are either inefficient or hard to implement. In case accelerator is installed into similar sockets and uses common QPI bus, it can have the same features as central processing units (CPUs) and have access to the same data-sets and be more transparent to programs. In fact, many years ago AMD has already proposed so-called Torrenza multi-socket platform that allowed third-party accelerators to be installed into AMD sockets.

Installation of compute accelerators into typical sockets also allows to rather easily install more of such devices into servers or onto special expansion boards. While sockets do not allow usage of high-speed GDDR5 or alike memory, it is easy to install more memory per compute accelerator thanks to high amount of DDR3 memory slots per CPU socket than onto an add-on card.