MIT Hornet helps with multi-core processors development

Posted on Monday, Mar 05 2012 @ 21:09 CET by Thomas De Maesschalck
Bit Tech reports MIT researchers have devised a more accurate system to model the performance of multi-core processors. The scientists claim that unlike existing simulators, their Hornet simulator is cycle-accurate even when dealing with models of 1,000 core chips.
Dubbed Hornet, the system is designed to model the performance of multi-core processors much more accurately than existing tools. The result, the team claims, is a tool that will make it a lot easier to evaluate many-core processor designs before committing to a run of silicon.

When scaling a processor design to hundreds - or, in some cases, thousands - of cores, things get extremely complex. As a trade-off, previous modelling systems have sacrificed accuracy in the name of efficiency in software systems and depended on scale models built from field-programmable gate arrays (FPGAs) where more accurate simulations are required.

Myong Hyon Cho, PhD student at MIT's Department of Electrical Engineering and Computer Science, claims Hornet offers something to fans of either approach. 'We think that Hornet sits in the sweet spot between them.'
Full details over here.

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Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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