EE Times reports TSMC will offer only one process at the 20nm node, because the foundry determined that there was no noticeable performance difference between their high-performance and low-power 20nm process. Additionally, TSMC executive vice president Shang-yi Chiang also revealed they might offer a 18nm or 16nm process node after 20nm if lythography technology is not available to make 14nm cost effectively.
Chiang said the TSMC initially planned to offer two 20-nm processes, presumably a high performance process and a low-power process. Both processes would have featured high-k metal gate (HKMG) technology.
But, after some development, TSMC determined that there was not a noticeable performance difference between the two 20-nm processes, Chiang said. Because 20-nm linewidths are so small, approaching fundamental physical limits, there isn't much room for tweaking design rules to specify different gate lengths and other requirements, Chiang said.
TSMC offers four processes at the 28-nm node: a high performance process, a low power process, another low power process with HKMG and a high performance process geared for mobile applications.
TSMC expects its 20-nm HKMG process to be in production next year. In 2015, TSMC wants to commence production at the 14-nm node, adding FinFET 3-D transistors.