NVIDIA illustrates power savings of 28nm vs 40nm

Posted on Friday, April 27 2012 @ 19:40 CEST by Thomas De Maesschalck
NVIDIA dedicated a blog article to the power consumption and power efficiency improvements of the 28nm Kepler architecture, you can read it over here. In the article NVIDIA reveals that in the past NVIDIA worked on the design while TSMC prepared the new process technology, but that for Kepler they began working with TSMC three years before the product tape-out to optimize both the process and the design to create a more efficient GPU.
The advancement that TSMC offered was a new optimized process technology. Kepler is manufactured using TSMC’s 28nm high performance (HP) process, the foundry’s most advanced 28nm process which uses their first-generation high-K metal gate (HKMG) technology and second generation SiGe (Silicon Germanium) straining. HKMG is a process that uses a gate insulator film with a high dielectric constant which reduces power by reducing gate leakage compared to the previous generation SiON gate. SiGe straining is a chemical process to stretch the silicon atoms to improve the mobility or the effective frequency of the transistor. Both technical advances improve the performance per watt of the transistor translating to a more power efficient system.



About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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