Intel demonstrates 32nm Rosepoint SoC with integrated WiFi

One of the interesting processor prototypes that Intel presented at this week's IDF in San Francisco is named Rosepoint, it's a 32nm SoC with two Intel Atom cores and a WiFi transceiver on the same die.

The project has been in development since the Spring IDF of 2002, when Intel's Pat Gelsinger envisioned a "Radio Free Intel" where every Intel processor would include onboard radio.

Current radios use a mix of analog and digital, with the analog components using disproportionately more energy and space. Rosepoint is the first demonstration of a digital radio, Intel had to rethink the radio and find measures to prevent interference issues between the CPU and the radio but a decade's worth of work has finally paid off. The 32nm digital WiFi radio is smaller and more power-efficient than current solutions and delivers better performance as it scales down to smaller process nodes. The 32nm radio reportedly has a power consumption of 21mW, versus 50mW on a 90nm process.

Bright Side of News reports future versions will support 4G LTE as well, which will come in handy as the chip giant is trying to gain a foothold in the smartphone chip market.

The digital baseband radio supports the WiFi protocol. In the future, Intel is planning to support communication standards such as 4G LTE with a single Digital Frequency Synthesizer and Digital Phase Modulator - a challenge which was deemed impossible. However, a decade in development and the creation of new mathematical model created a possible digital world, where a single SoC can be created of digital elements, reducing the size of package which as we all know - cannot scale due to the nature of analog circuits.

When we can expect the first chips with integrated digital radio is unknown, but according to ZD Net, Intel mentioned the 10nm generation, which may appear by the middle of the decade.