TSMC: 450mm wafers and EUV critical for 10nm and 7nm nodes

Posted on Friday, October 26 2012 @ 15:11 CEST by Thomas De Maesschalck
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TSMC CEO and chairman Morris Chang said his foundry sees 450mm manufacturing and extreme ultraviolet (EUV) lithography as critical for economically viable chip manufacturing at 7nm or even 10nm process nodes. The Taiwanese company has acquired land to build a center that will explore 7nm technology and test 450mm production. The first pilot 450mm lines are expected to go online in 2016 or 2017, and commercial production of 450mm wafers is anticipated in 2018.
“The EUV lithography and 450mm are important to us at 10nm and beyond. […] EUV, I think, is the only economic way of doing, I will not say 10nm, but surely it will be the only economic way of doing 7nm. Even at 10nm, if we have a high-throughput EUV, our costs will be in better shape. Of course, we can use double patterning, triple patterning, quadruple patterning, but those we would like to avoid. Avoiding them depends on [ASML’s success] with their high-throughput EUV,” said Morris Chang, chief executive officer and chairman of TSMC.

Currently available ASML’s six pre-production NXE:3100 EUV systems can produce up to 7 wafers per hour with 11W light source. ASML and Cymer jointly made significant progress during the summer and have now proven in laboratories a sustained 30W source exposure power potential, which would enable the NXE:3300B to expose 18 wafers per hour. ASML’s specified target remains at 105W or 69 wafers per hour (wph), to be achieved for 2014 microchip production.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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