Posted on Tuesday, April 02 2013 @ 20:53 CEST by Thomas De Maesschalck
CPU World published details about Intel's upcoming Haswell-based Xeon processors, you can read it
over here. Xeon E7 v2 will arrive in Q4 2013, while Xeon E5-2600 v2 will launch a quarter earlier. Xeon E5-2400 v2 on the other hand will follow in Q4 2014.
Xeon E7 v2 and "Brickland" platform will be released in Q4 2013. These CPUs will incorporate up to 15 cores and up to 37.5 MB of L3 cache. The CPUs will have Hyper-threading technology enabled, as a result they will be able to execute up to 30 threads at once. The CPUs will also support VT-x, VT-d and VT-c virtualization, Turbo Boost 2.0, Trusted Execution technology, along with Intel Secure Key and OS Guard features. The processors will be coupled with C602J chipset, and will utilize up to four C102/C104 scalable memory buffers per socket. Each scalable memory buffer will support up to 3 DDR3-1600 DIMMS, as such the maximum number of DIMMS per processor is going to be 24. Other communications interfaces on Xeon E7 v2 chips will include 3 QPI links, and up to 32 lanes of PCI Express 3.0.
