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IC Insights: Sub-40nm processes account for 27% of wafer capacity

Posted on Tuesday, April 09 2013 @ 12:40:25 CEST by

A report by IC Insights found that process technology below 40nm accounted for 27 percent of global wafer capacity at the end of 2012, while about 22 percent of capacity was for mature process nodes at 90nm, 130nm and 180nm. Full details at DigiTimes.
At the end of 2012, about 27% of capacity was for devices having geometries smaller than 40nm. Such devices include high-density DRAM, which are typically built using 30nm- to 20nm-class process technologies; high-density flash memory devices that are based on 20nm- to 10nm-class processes; and high-performance microprocessors and advanced ASIC/ASSP/FPGA devices based on 32nm, 28nm or 22nm technologies.

Samsung Electronics was the largest supplier of ICs built using geometries below 40nm as of the end of 2012, followed by Intel, Toshiba/SanDisk, SK Hynix and Micron Technology, IC Insights observed.

About 22% of the global installed capacity was dedicated to ICs built at 90nm, 0.13-micron and 0.18-micron nodes, IC Insights said. These "mature" process technologies are mainly offered by pure-play foundries, including TSMC, UMC, Globalfoundries, SMIC and TowerJazz, IC Insights noted.



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