
Posted on Monday, February 10 2014 @ 13:20 CET by Thomas De Maesschalck
AnandTech reports Intel filled in some more blanks about Haswell at ISSCC in San Francisco, you can read about it
over here.
The first bit of new information we have are official transistor counts for the range of Haswell designs. At launch Intel only disclosed transistor counts and die areas for Haswell ULT GT3 (dual-core, on-die PCH, GT3 graphics) and Haswell GT2 (quad-core, no on-die PCH, GT2 graphics). Today we have both the minimum and maximum configurations for Haswell. Note all transistor counts below are schematic not layout.