Toshiba MRAM cache could drop CPU power consumption by 60 percent

Posted on Thursday, June 12 2014 @ 11:26 CEST by Thomas De Maesschalck
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ExtremeTech writes the adoption of Toshiba's new STT-MRAM (spin-transfer torque magnetoresistive random access memory) could reduce the power consumption of CPUs by up to 60 percent versus the traditional SRAM-based L2 cache. In the past MRAM proved impractical because it was less efficient than SRAM at the desired performance level but now Toshiba managed to create MRAM that performs close to SRAM while significantly reducing power leakage.
SRAM is a type of volatile memory, meaning the data goes away when it’s turned off. MRAM, by contrast, is non-volatile thanks to its vastly different architecture. Whereas all DRAM stores data as units of electric charge, MRAM uses a series of magnetic storage elements. The specific spin-transfer torque version of the technology used by Toshiba uses spin-aligned electrons to modify data more efficiently. According to Toshiba, its MRAM solution could eliminate most of the power leakage from L2 cache, which by itself can account for up to 80% of L2 power usage.




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