Why first-gen HBM is limited to 4GB for AMD's Fiji

Posted on Wednesday, Feb 11 2015 @ 15:39 CET by Thomas De Maesschalck
By now you may have heard that the first-generation High Bandwidth Memory (HBM), that will be used by AMD's Radeon R9 390/390X "Fiji" GPUs is limited to 4GB. The reason for this appears to be that AMD is using a 2.5D-IC silicon interposer, which means there will be two separate chips on the same silicon interposer and package substrate. One of these chips will be the 28nm Fiji GPU while the other part will be a batch of 3D-stacked HBM chips.

FUD Zilla claims more than 4GB HBM isn't possible as you can't fit more chips on a 2.5D interposer. Hynix will have to make higher-density HBM memory chips to make 8GB 2.5D cards possible as putting eight chips on the interposer would result in a massively big chip.

AMD's Fiji is expected to be announce in June 2015 according to the latest rumors. NVIDIA on the other hand is rumored to wait with the adoption of HBM until it introduces its 16nm Pascal GPU in 2016. The HBM integration of Pascal will be more advanced as NVIDIA will use Vertical Stacking, which brings them inside the same package as the GPU.
From what we've learned, Fiji is limited to 4GB memory. With the current memory technology the GPU would simply be too big to put on an interposer and package. The interposer should be viewed as a stack of conductors that lets the GPU and HBM memory communicate at much higher speeds than ever before. The interposer then gets into the package that goes on PCB. You could say the interposer is the middle-man that makes things faster.


Nvidia on the other hand is using what is called Vertical stacking 3D, or on-package stacked DRAM for its Pascal 2016 GPUs. Nvidia gives a straightforward explanation of the meaning of 3D memory on Pascal: "3D memory: Stacks DRAM chips into dense modules with wide interfaces, and brings them inside the same package as the GPU." The clear benefits are a massive increase in bandwidth and quadruple energy efficiency. Nvidia is waiting for 16nm to make such a chip possible, and 3D memory is better approach than the interposer.
HBM slide from AMD

About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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