AMD Carrizo APU promises big gains in efficiency

Posted on Thursday, Mar 05 2015 @ 14:42 CET by Thomas De Maesschalck
AMD shared some new details about its upcoming 28nm Carrizo APU at the International Solid State Circuits Conference (ISSCC). The firm aid the new Excavator cores in Carrizo promise an uplit in instructions-per-clock (IPC) at 40 percent less power consumption. The chip packs 29 percent more transistor in almost the same die size as its predecessor, Kaveri, and has Radeon GPU cores with dedicated power supply.

Carrizo promises double-digit percentage increases in both performance and battery life and inclues on-chip H.265 video decode acceleration. It will also be AMD's first high-performance APU with integrated southbridge.

AMD Corporate Fellow Sam Naffziger boasts Carrizo will deliver the largest generational performance-per-Watt gain ever for a mainstream AMD APU.
Several new power efficient technologies make their debut on the Carrizo APU. To deal with transient drops in voltage, which is known as droop, traditional microprocessor designs supply excess voltage on the order of ten to fifteen percent to ensure the processor always has appropriate voltage. But over-voltage is costly in terms of energy because it wastes power at a rate that is proportional to the square of the voltage increase; i.e. 10% over-voltage means about 20% wasted power.

AMD has developed a number of technologies to optimise voltage. Its latest processors compare the average voltage to droops on the order of nanoseconds, or billionths of a second. Starting with the Carrizo APU, this voltage adaptive operation functions in both the CPU and the GPU. Since the frequency adjustments are done at the nanosecond level, there’s almost no compromise in computing performance, while power is cut by up to 10 percent on the GPU and up to 19% on the CPU. Another power technology that debuts in Carrizo is called adaptive voltage and frequency scaling (AVFS). This technology involves the implementation of unique, patented silicon speed capability sensors, and voltage sensors in addition to traditional temperature and power sensors. The speed and voltage sensors enable each individual APU to adapt to its particular silicon characteristics, platform behaviour, and operating environment. By adapting in real-time to these parameters, AVFS can lead to up to 30 percent power savings.

In addition to helping reduce power use on the CPU by shrinking the core area, AMD worked to optimise the 28nm technology for power efficiency, and tuned the GPU implementation for optimal operation in power-limited scenarios. This enables up to a 20% power reduction over the Kaveri graphics at the same frequency. Combined, AMD’s energy efficiency innovations aim to deliver power savings on the order of a manufacturing technology shrink while staying in a well-characterised, cost-optimised 28nm process.
Further details can be read at eTeknix.

AMD Carrizo slide


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Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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