Both AMD and Nvidia, among others, have talked about and been working on implementations of stacked memory architectures, but AMD will be the first to ship. Lisa Su said that it's been in development for a long time, and the decision to put it into production now was predicated on both the necessity and fit for a high-end graphics part, and because the volume shipments expected with the new GPU should help push HBM down the cost curve so that it's applicable to other implementations and products. Surprisingly, AMD made this decision 18 months ago, Su told us.
Su would not comment on when we would see other HBM implementations, nor on which products, but she said that there are neither production nor technology limitations, just decisions to be made "based on the company's overall product roadmap, and individual market decisions." AMD has said that there would eventually be an APU with a high-bandwidth memory implementation. It just hasn't said when.
AMD CEO hints at 2x energy efficiency improvements on new FinFET process
Posted on Thursday, June 11 2015 @ 10:35 CEST by Thomas De Maesschalck