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TSMC started volume production on 16nm, 7nm to share 10nm elements

Posted on Monday, July 20 2015 @ 14:45:02 CEST by

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Taiwanese foundry TSMC presented its second-quarter financial results last week and held a conference call with financial analysts to discuss the numbers and answer questions. While we won't bore you with the financial figures in this post, some other interesting snippets were shared in regards to TSMC's process development.

Mark Liu, TSMC's President and Co-CEO, revealed his company just started volume shipments of 16nm. He promised the ramping of 16nm will be even steeper than their 20nm ramp and expects TSMC will achieve a far majority foundry share in 16 nanometer in 2016 and beyond. C.C. Wei, TSMC President and Co-CEO, later clarified that volume production started in Q2 2015 and that actual product shipments to clients will start this month. The high volume ramp in third quarter were mostly contributed to revenue in fourth quarter this year. Don't get your hopes up about any 16nm GPUs hitting the market this year though, these things take much time.

Liu also proclaimed encouraging success with the 10nm node, he said everything is on track to start technology risk start qualification towards the end of this year, followed by many customers' product qualification. Volume production of 10nm products at TSMC is expected to happen in late 2016, with "real product shipment" in Q1 2017. Wei did not comment on when exactly 10nm products would hit retail shelves.

TSMC's 10nm node promises "excellent transistor performance spec and very aggressive chip-scaling factors", the firm notes it offers a 10 percent speed gain at the same total power when compared to its 16 FinFET+, or an over 35 percent power reduction at the same speed. The gate density is said to be 2.2 times that of 16 FinFET+. As KitGuru points out the performance of TSMC's 10nm process does not sound very impressive, it focuses greatly on increasing transistor density to decrease the cost per transistor but the promised performance gains and power savings are very similar to those offered by the TSMC's CLN16FF+ versus CLN16FF.

Liu added that many of TSMC's first-wave technology adopters have signed up for 10nm tapeouts. So far, the firm has done tape-outs for "mobile applicaton processors, network processors, and high-performance computing segments".

While Intel is getting a little more cautious, as seen with the firm's 10nm delay, TSMC seems to be bursting with confidence. The Taiwanese foundry says its 7nm program is ongoing with full steam, they have a parallel team working on 7nm and believe they'll be able to do technology qualification in Q1 2017, just five quarters after 10nm.

One reason for this quick followup seems because TSMC's 7nm process will share similarities with 10nm rather than being a completely new process like Intel does. This seems similar to 16nm, Wei confirmed during the call that TSMC's 16nm node shares similar metal backend process with 20nm and claims 16 FinFET can benefit a lot from 20nm's learning. This is somewhat similar to Samsung and Globalfoundries, who also re-use 20nm elements on the 14nm node. While this approach may enable TSMC to get its new processes out quicker, the downside is the gains from the shrink may not be that spectacular because it's not a completely new process but more of a half shrink.

On the plus side, TSMC's 16nm yield and defect density has been excelled, Wei noted, adding that 16 FinFET has "set a new record for progresses made in the defect density reduction."

Transcript courtesy of The Street



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