AMD: Work on HBM started in 2006-2007

Posted on Monday, August 31 2015 @ 12:20 CEST by Thomas De Maesschalck
Developing a new memory standard takes a long time, work on DDR4 memory for example started in 2005, a couple of years before the commercialization of DDR3 memory, so it doesn't come as a big surprise that work on High Bandwidth Memory (HBM) started a long time ago. KitGuru has written an interesting piece about how HBM came to be, and how this new industry standard was first conceived at ATI/AMD sometime around 2006-2007. HBM is expected to pick up the torch passed down by GDDR and may deliver video cards with 2TB/s or 4TB/s memory bandwidth in the next 5-7 years. You can read the full piece over here.
By 2006 – 2007, when the work on the ATI R600 graphics processor with 512-bit memory bus as well as on the GDDR4 and the GDDR5 memory technologies was essentially completed, it became clear that memory consumed a lot of power already and would consume even more over time. Since ATI and Nvidia planned to use their GPUs for high-performance computing (HPC) applications, which require a lot of local memory, it was obvious that power consumption of GDDR was going to become a problem.

At the time, new memory tech development team at ATI Technologies led by Joe Macri came up with an idea of brand-new memory technology, which could provide extreme bandwidth while consuming a low amount of energy. The key elements of the new technology were multi-layer memory devices with an ultra-wide interfaces that used silicon interposer to connect to a processing device.
AMD start of HBM


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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