TSMC to launch cost-reduced 16nm process in 2016, early 10nm production this year

Posted on Friday, Sep 18 2015 @ 13:10 CEST by Thomas De Maesschalck
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TSMC presented an updated version of its roadmap and revealed it plans to start early production on a 10nm process later this year and 7nm in 2017. A cost-reduced version of its 16nm process is slated for 2016 as well as a broad range of specialty processes designed for Internet of Things, automotive and sensors.

The Taiwanese foundry also made a working prototype of a 10nm FinFET chip. The 10nm FinFET node promises 0.52x area scaling versus 20nm and either 18 percent higher speed or 40 percent less power consumption than TSMC's 16FF+ process. The downside though is that 10nm requires triple patterning and an entire new EDA (electronic design automation) design flow. Full details at EE Times.
The road map suggests TSMC could leapfrog Intel to producing 10nm chips, although naming conventions for nodes these days hide the underlying details of the processes. What's more clear is TSMC has gotten off to a slow start with its 16nm FinFET process with close partners such as Xilinx saying they have taped out but not yet shipped their first chip in the process. Xilinx also plans to skip TSMC’s 10mn process in favor of its 7nm node, a significant choice given Xilinx typically acts as a logic driver for new TSMC nodes.

About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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