JEDEC announced improvements to the LPDDR4 and LPDDR4X memory standards. The new specifications allow for memory with higher clockspeeds and better energy efficiency:
JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-4B, Low Power Double Data Rate 4 (LPDDR4) and JESD209-4-1, Addendum No. 1 to JESD209-4, Low Power Double Data Rate 4X (LPDDR4X). Both mobile memory standards are designed to significantly boost memory speed and efficiency for mobile computing devices such as smartphones, tablets, and ultra-thin notebooks. Developed by JEDEC’s JC-42.6 Subcommittee for Low Power Memories, these documents are available for free download from the JEDEC website.
This latest revision of LPDDR4 offers several updates intended to achieve even higher performance over the previous version of the standard, including:
Addition of a single-channel die option for smaller applications
Addition of new MCP, PoP and IoT packages
Additional definition and timing improvements for the highest 4266 Mbps speed grade
The new LPDDR4X standard is an optional extension intended to offer product designers options for further power reduction as well as on die termination (ODT) flexibility. In LPDDR4X, the I/O supply voltage (VDDQ) is reduced from 1.1 V to 0.6 V. This 40% voltage reduction leads to much lower power usage when sending and receiving data from the memory device, which is particularly beneficial for smartphones and other handheld devices. In addition, LPDDR4X supports easily programmable command bus termination for high memory density systems.
“The demand for memory solutions that will enable mobile devices to offer greater performance with lower power usage continues to grow, and JEDEC remains committed to developing and modifying our standards to meet these performance expectations,” said Mian Quddus, JEDEC Board of Directors Chairman.