TSMC Wafer-on-Wafer tech enables stacking of GPUs

Posted on Thursday, May 03 2018 @ 15:29 CEST by Thomas De Maesschalck
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TSMC revealed some details about Wafer-on-Wafer (WoW), a new technology that will allow future chips to be stacked similar to what is done today with HBM2 technology. As TweakTown points out, this technology makes it possible to stack two GPUs.

It's superior to current dual-GPU technology due to the lack of latency issues. But the downside is that if one of the wafers is bad, both chips can't be used. Additionally, I imagine heat will also be a problem for scaling.
TSMC uses 10-micron holes that form a through-silicon via (TSV) connection that connect the two GPUs together. There won't be latency problems between the connected GPUs as the wafter has the ability to let the GPUs communicate quickly, meaning we could see dual-GPU graphics cards based on current GPUs like the Polaris and Pascal GPUs from AMD and NVIDIA, respectively.

There is a downfall to using TSMC's new WoW technology in that if the GPUs are bonded together and one of the wafers is bad, both are binned and can't be used. We won't see Vega with dual-GPUs because of it, but high yield GPUs like the GP10x range from NVIDIA and the RX 500 series could go dual-GPUs with refreshes and be monsters.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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